Page 9 - husk_nvidia_-2_n13p-gl

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VCCSA_VID0 VCCSA_VID1 Wistron Corporation Wistron Corporation Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, of of of 9 9 9

1 Do Not Stuff Do Not Stuff 10KR2J-L-GP 10KR2J-L-GP Taipei Hsien 221, Taiwan, R.O.C. Taipei Hsien 221, Taiwan, R.O.C. Taipei Hsien 221, Taiwan, R.O.C. Document Number CPU (VCC_GFXCORE) Document Number CPU (VCC_GFXCORE) Document Number CPU (VCC_GFXCORE) Sheet Sheet Sheet 1
1D05V_VTT_CPU 2 R912 R912 DY DY 1 2 R914 R914 1 Husk/Petra Husk/Petra Husk/Petra Tuesday, October 09, 2012 Tuesday, October 09, 2012 Tuesday, October 09, 2012
BE7 and BG7 is NC ball in HR Do Not Stuff u f f DY DY 1D05V_VTT_CPU 2 R908 R908 Do Not Stuff Do Not Stuff DY DY 1 VCCSA_VID0 VCCSA_VID1 2 R913 R913 10KR2J-L-GP 10KR2J-L-GP 1 IVB IVB IVB Title Title Title Size Size Size Custom Custom Custom Date: Date: Date:

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C926
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C917
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37 37 1D5V_S0 SC1U6D3V2KX-L-1-GP P R902 need be close to pin U10.
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C918 1 8
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2 M_VREF_DQ_DIMM0_C M_VREF_DQ_DIMM1_C S SC1U6D3V2KX-L-1-GP P 0D85V_S0 1 R902 R902 100R2F-L1-GP-U 100R2F-L1-GP-U 2 2
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Power from DDR_VREF_S3 and +V_SM_VREF_CNT should have 10 mils trace width. 37 +V_SM_VREF_CNT 4 3 RN902 RN902 Do Not Stuff Do Not Stuff DY DY 1 2 C C924 2 1 1 1 N 1 N 4 3 2 o o t t S S t t u u 2 f 2 f f f DY DY DY DY DY DY +V1.5S_VCCD_Q should be short to +V1.5S_VCCDDQ on board 1D5V_S0 Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
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Routing Guideline: M_VREF_DQ_DIMM0_C M_VREF_DQ_DIMM1_C Iccmax:5A SC10U6D3V5KX-1GP P P PROCESSOR DDR 1.5V QUIET RAIL (BGA only) R909 R909 1 Do Not Stuff 2 Do Not Stuff 2 1 C923 C923 SC1U6D3V2KX-L-1-GP SC1U6D3V2KX-L-1-GP TP901 TP901 1 TP902 TP902 1
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C911
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SC10U6D3V5KX-1GP
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C910
AY43 BE7 BG7 AJ28 AJ33 AJ36 AJ40 AL30 1 AL34 AL38 AL42 2 AM33 AM36 AM40 AN30 AN34 AN38 AR26 AR28 AR30 AR32 AR34 AR36 AR40 AV41 AW26 BA40 BB28 BG33 +1.5S_VCCD_Q +1.5S_VCCD_Q AM28 AN26 TP_VDDQ_SENSE BC43 TP_VDDQ_VSS BA43 VCCSA_SENSE U10 VCCSA_VID0 D48 VCCSA_VID1 D49 Dr-Bios.com
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7 OF 9 7 OF 9 SM_VREF SA_DIMM_VREFDQ SB_DIMM_VREFDQ VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VDDQ23 VDDQ24 VDDQ25 VDDQ26 VCCDQ1 VCCDQ2 VDDQ_SENSE VSS_SENSE_VDDQ VCCSA_SENSE VCCSA_VID0 VCCSA_VID1
POWER POWER VREF VREF DDR3 - 1.5V RAILS DDR3 - 1.5V RAILS GRAPHICS GRAPHICS LINES LINES SENSE SENSE QUIET RAILS QUIET RAILS 1.8V RAIL 1.8V RAIL SENSE LINES SENSE LINES SA RAIL SA RAIL lines lines VCCSA VID VCCSA VID
CPU1G CPU1G VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54 VAXG55 VAXG56 VAXG_SENSE VSS
AA46 AB47 AB50 AB51 AB52 AB53 AB55 AB56 AB58 AB59 AC61 AD47 AD48 AD50 AD51 AD52 AD53 AD55 AD56 AD58 AD59 AE46 N45 P47 P48 P50 P51 P52 P53 P55 P56 P61 T48 T58 T59 T61 U46 V47 V48 V50 V51 V52 V53 V55 V56 V58 V59 W50 W51 W52 W53 W55 W56 W61 Y48 Y61 F45 G45 BB3 BC1 BC4 L17 L21 N16 N20 N22 P17 P20 R16 R18 R21 U15 V16 V17 V18 V21 W20
ICC_MAX:1.2A
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SC10U6D3V5KX-1GP P ICC_MAX:6A
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C C920 2 1 0 2 SC1U10V2KX-1GP SC1U10V2KX-1GP SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP
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S SC10U6D3V5KX-1GP P VCC_AXG_SENSE VSS_AXG_SENSE 1D8V_S0 1 C922 C922 2 0D85V_S0 1 C915 C915 2
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C919
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Iccmax:18A(GT1) ICC_TDC:12A(GT1) S SC10U6D3V5KX-1GP P S SC1U6D3V2KX-L-1-GP P R906,R907 close to CPU 42 42
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C916
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C914
C Do Not Stuff u f 2 f 2 DY DY D Do Not Stuff u DY DY f f VCC_AXG_SENSE VSS_AXG_SENSE
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C904
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Do Not Stuff u f f Do Not Stuff u f f

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C903 0 1 3 2 DY DY C C909 0 9 2 DY DY VCC_GFXCORE 1 2 1 2
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S SC10U6D3V5KX-1GP P SC1U6D3V2KX-L-1-GP P R906 R906 R907 R907
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5 C C902 0 1 2 2 C907 0 7 2 100R2F-L1-GP-U 100R2F-L1-GP-U 100R2F-L1-GP-U 100R2F-L1-GP-U 5
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SSID = CPU VCC_GFXCORE
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