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Check test point 5V_S5 Test Point放放Dimm Door打打打打打打 放放 放放 放放 UNUSED PARTS/EMI Capacitors UNUSED PARTS/EMI Capacitors UNUSED PARTS/EMI Capacitors Husk/Petra Husk/Petra Husk/Petra
1 AFTP1 AFTP1 1 AFTP7 AFTP7 1 AFTP8 AFTP8 1 AFTP9 AFTP9 1 AFTP10 AFTP10 1 AFTP11 AFTP11 1 AFTP12 AFTP12 1 AFTP13 AFTP13 1 打打打打打打 打打打打打打 打打打打打打 Wistron Corporation Wistron Corporation Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Taipei Hsien 221, Taiwan, R.O.C. Taipei Hsien 221, Taiwan, R.O.C. of of of 97 97
3D3V_AUX_S5
3D3V_S0
3D3V_S5
5,18,27,31,36,65,71,83 1 DY DY EC9728 EC9728 Do Not Stuff Do Not Stuff 1 DY DY EC9729 EC9729 Do Not Stuff Do Not Stuff
19,27 PM_PWRBTN# H_CPUPWRGD 5,22,36 S5_ENABLE 27,36 PLT_RST# 2 2 AUD_AGND IVB IVB IVB Title Title Title Document Number Document Number Document Number Size Size Size A3 A3 A3 Tuesday, August 14, 2012 Tuesday, August 14, 2012 Tuesday, August 14, 2012 Date: Date: Date:
STF236R128H34-1-GP STF236R128H34-1-GP 1st = 34.4TU18.001 1st = 34.4TU18.001 2nd = 34.4TU18.101 2nd = 34.4TU18.101
2 2
HS1 HS1 1 1st = 34.4TU18.001 1st = 34.4TU18.001 2nd = 34.4TU18.101 2nd = 34.4TU18.101
STF236R128H34-1-GP STF236R128H34-1-GP HS5 HS5 STF236R128H34-1-GP STF236R128H34-1-GP 1 Muxless Muxless
o
u
t
o
S
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HS2 HS2 1 1st = 34.4TU18.0011st = 34.4TU18.001 1st = 34.4TU18.0011st = 34.4TU18.001 2nd = 34.4TU18.101 2nd = 34.4TU18.101 2nd = 34.4TU18.101 2nd = 34.4TU18.101 1st = 34.4TU18.001 1st = 34.4TU18.001 2nd = 34.4TU18.101 2nd = 34.4TU18.101 VGA 3D3V_S0 D Do Not Stuff f 2 f
8
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EC9708
0
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9
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DY
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1
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9
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EC9725
2
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7
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CPU HS3 HS3 1 HS4 HS4 1 Muxless Muxless
PWR_VCCCORE1_DCBATOUT D Do Not Stuff f f DY DY
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7
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EC9704
4
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3 1 2 Do Not Stuff f 2 f Dr-Bios.com 3
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9
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EC9720
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0
2
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2
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SCD1U10V2KX-L1-GP P
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Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff 1 2
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9
1
7
9
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EC9719
H11 H11 1 H12 H12 1
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Do Not Stuff f f
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9
1
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7
EC9718 8
DY DY 2
1
Do Not Stuff Do Not Stuff Do Not Stuff f f
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N
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7
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EC9717
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1
9
7
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5
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1
0
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H10 H10 1 SCD1U50V3KX-GP P 5V_S0 1 DY DY 2
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3
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EC9721
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C
9
2
1
7
1
2
3
1
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SCD1U50V3KX-GP P
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0
D
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5
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E EC9722 2 S SCD1U50V3KX-GP P
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9
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Do Not Stuff Do Not Stuff 1 2 D Do Not Stuff f f E EC9731 1
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3
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1
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0
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3
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7
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6
7
9
1
EC9716
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C
H6 H6 1 Do Not Stuff f f 1 DY DY 2 1 2
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D
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9
2
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7
4 S SCD1U50V3KX-GP P 4
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1
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0
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3
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7
9
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H5 Do H5 Do Not Stuff Not Stuff 1 DY DY 2 Do Not Stuff f f -2:EMI DCBATOUT E EC9730 1 0 2
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7
C
5
1
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EC9715
9
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5
0
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SCD1U50V3KX-GP P 1 DY DY 2
1
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3
EC9707 7
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7
0
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9
1
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D Do Not Stuff f f
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2
1
7
1
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EC9714 4
9
DCBATOUT_2 1 DY DY 2 Do Not Stuff f f
H4 Do
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H4 Do Not Stuff Not Stuff D Do Not Stuff f f 1 DY DY 2
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EC9702
7
2
0
9
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D
1
1
0
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V
9
2
EC9713
1
G
-
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L
E
1
6
2
C
EC9726
E
9
7
DY 7 1 3 DY 2 LCDVDD S SCD1U10V2KX-L1-GP P
1
2
1
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H3 Do H3 Do Not Stuff Not Stuff SCD1U50V3KX-GP P Do Not Stuff f f
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1
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0
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5
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D
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3
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N
DCBATOUT 1 2 1 DY DY 2
0
9
2
C
1
EC9712
C
1
E
EC9701
E
9
7
7
1
N
S
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3
D
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1
0
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-
D Do Not Stuff f f SCD1U50V3KX-GP P
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1
0
9
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9
7
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7
E EC9711 1 E EC9703 3
H2 Do H2 Do Not Stuff Not Stuff 1D5V_S3 1 DY DY 2 DCBATOUT 1 2
1
D Do Not Stuff f f
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N
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5 5
7
E EC9706 6
C
0
9
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DY
H1 Do Not Stuff Not Stuff D Do Not Stuff 2 f f
H1 Do
1
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1D05V_VTT E EC9705 5 DY DY 2
7
0
C
9
1
1
D C B A
