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Figure 5.17 : Bits used in SIM instruction
Example :
The following instructions are used to enable interrupt RST 5.5 and disable RST
7.5 and RST 6.5 :
D D D D D D D D
0
4
5
1
2
3
6
7
0 0 0 0 1 1 1 0
MVI A, 0EH ; Bits D = 1 and D = 0
0
3
SIM ; Enable RST 5.5
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