Page 66 - R2017-REC-ECE-UG Syllabus

Department of ECE, REC

LIST OF EXPERIMENTS
Laboratory work on HDL and FPGA:
1. Design an Adder (Min 8 Bit) using HDL. Simulate it using Xilinx/Altera Software and implement by
Xilinx/Altera FPGA .
2. Design a Multiplier (4 Bit Min) using HDL. Simulate it using Xilinx/Altera Software and implement by
Xilinx/Altera FPGA.
3. Design an ALU using HDL. Simulate it using Xilinx/Altera Software and implement by Xilinx/Altera
FPGA.
4. Design counters using HDL. Simulate it using Xilinx/Altera Software and implement by Xilinx/Altera
FPGA
5. Design a Universal Shift Register using HDL. Simulate it using Xilinx/Altera Software and implement by
Xilinx/Altera FPGA.
6. Design Finite State Machine (Moore/Mealy) using HDL. Simulate it using Xilinx/Altera Software and
implement by Xilinx/Altera FPGA.
Compare pre synthesis and post synthesis simulation for experiments 1 to 6.
Requirements: Xilinx ISE/Altera Quartus/ equivalent EDA Tools along with Xilinx/Altera/equivalent FPGA
Boards
Using Cadence/Mentor Graphics/Tanner/equivalent EDA Tools:
7. Design and simulate a CMOS inverter using digital flow.
8. Design and simulate a CMOS Basic Gates.
9. Manual/Automatic Layout Generation for experiments 7 and 8.
10. Analyze the power, area and timing for experiments 7 and 8 by performing Pre Layout and Post Layout
Simulations.
11. Design and Simulate basic Common Source, Common Gate and Common Drain Amplifiers.
12. Design and simulate simple differential amplifier and Analyze Gain, Bandwidth and CMRR by
performing Schematic Simulations.
Requirements: Cadence/Synopsis/ Mentor Graphics/Tanner/equivalent EDA Tools

TOTAL = 60 PERIODS
OUTCOMES:
At the end of the course, the student should be able to:
• Write HDL code for basic as well as advanced digital circuits.
• Realize digital logic circuits on FPGA Boards.
• Synthesize Place and Route digital IPs.
• Design, Simulate and Extract layout of Digital & Analog circuit blocks using EDA tools.

LAB EQUIPMENT FOR A BATCH OF 30 STUDENTS:
Xilinx or Altera FPGA - 10 nos
Xilinx software Cadence/MAGMA/Tanner or equivalent software package 10 User License
PCs-10nos

EC17612 NETWORKS LABORATORY L T P C
0 0 4 2
PREREQUISITE: Knowledge on Oops

OBJECTIVES:
The student should be made to

Curriculum and Syllabus | B.E. Electronics and Communication Engineering | R2017 Page 66