Page 112 - Digital Electronics by harish

Pipelining

Pipelining means that SDRAM can accept a new instruction before it has finished
processing the previous one. In other words, it can effectively process two instructions at
once. One write command can be immediately followed by another write command without
waiting for the original data to be stored.

SDRAM architecture

The SDRAM architecture can be split into two main areas:

 Array: This is the area of the chip where the memory cells are implemented. It is
normally divided into a number of banks, which in turn is split into smaller areas
called segments.
 Periphery: This is the area of the chip where control and addressing circuitry is
located as well as items such as line drivers and sense amplifiers.

SDRAM devices are internally divided into 2, 4 or 8 independent internal data banks.
SDRAM can accept one command and transfer one word of data per clock cycle. Typical
clock frequencies are 100 and 133 MHz. Chips are made with a variety of data bus sizes
(most commonly 4, 8 or 16 bits).

SDRAM chips are generally assembled into 168-pin DIMMs (Dual In-line Memory
Modules) that read or write 64 or 72 bits at a time.

4.6 DDR SDRAM

Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM)
is a type of memory IC used in computers. Compared to Single Data Rate (SDR) SDRAM,
the DDR SDRAM interface makes higher speeds possible by more strict control of the timing
of the clock signals. Phase Locked Loops (PLLs) are used to meet the required timing
accuracy. The interface uses double pumping (transferring data on both the rising and falling
edges of the clock signal) to lower the clock frequency.

The name "double data rate" refers to the fact that a DDR SDRAM achieves nearly
twice the bandwidth of a SDR SDRAM running at the same clock frequency, due to this
double pumping.

With data being transferred 64 bits at a time, DDR SDRAM gives a transfer rate of
(memory bus clock rate) × 2 (for dual rate) × 64 (number of bits transferred) / 8 (number of
bits per byte). Thus, with a bus frequency of 100 MHz, DDR SDRAM gives a maximum
transfer rate of 1600 MB/s (Mega Bits per second).

DDR SDRAM banks

DDR SDRAM memory has multiple banks. This enables the memory to provide
multiple interleaved memory access, and this enables the overall memory bandwidth to be
increased. DDR SDRAMs access multiple memory locations in a single read or write
command.

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