Page 100 - Digital Electronics by harish

The operation of SISO, SIPO, PISO and PIPO are explained in the following sections.

3.3.2 Serial IN – Serial OUT (SISO) Shift register

In SISO shift register the input is given in serial form (i.e. one bit by one bit) and the
output is taken in serial form. The logic diagram of SISO shift register is shown in figure.
Four D FFs A, B, C and D are used is synchronous mode. Clock pulse is applied to all the
FFs simultaneously. The Serial Input Data (SI) is given to the D input of the first FF. The Q
output of FF A is given to the D input of FF B. The Q output of FF B is given to the D input
of FF C. The Q output of FF C is given to the D input of FF D. The Serial Output data (SO) is
taken from the Q output of FF D. The CLEAR inputs of all the FFs are connected to ground
through the Master Reset switch.

The sequence for input and output operations is given in table.

Input (Write) operation Output (Read) operation
S.No Sequence (Serial Input) S.No Sequence (Serial Output)
The first bit is available in
Press the Master RESET
1. 1. the Serial Output (SO)
switch to clear all the FFs.
terminal.
Give the serial data to the Give first clock pulse to get
2. Serial Input terminal SI, 2. the second bit from SO
one by one (4 bits). terminal.
For each input, one clock Give second clock pulse to
3. pulse must be applied (4 3. get the third bit from SO
clock pulses). terminal.
Give third clock pulse to
The data (4 bits) are stored
4. 4. get the fourth bit from SO
in the four FFs.
terminal.

3.3.3 Serial IN – Parallel OUT (SIPO) Shift register

In SIPO shift register the input is given in serial form (i.e. one bit by one bit) and the
output is taken in parallel form (i.e. all the bits at the same time). The logic diagram of SIPO
shift register is shown in figure. Four D FFs A, B, C and D are used is synchronous mode.
Clock pulse is applied to all the FFs simultaneously. The Serial Input Data (SI) is given to the
D input of the first FF. The Q output of FF A is given to the D input of FF B. The Q output of
FF B is given to the D input of FF C. The Q output of FF C is given to the D input of FF D.
The Parallel Output data (ABCD) are taken from the Q outputs of each FF. The CLEAR
inputs of all the FFs are connected to ground through the Master Reset switch.

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