Page 74 - Digital Electronics by harish

Figure : Logic diagram of 4-bit Even parity checker

Data input Parity bit Error Bit
Input
D 3 D 2 D 1 D 0 P E
0 0 0 0 0 0
0 0 0 1 1 0
0 0 1 0 1 0
0 0 1 1 0 0
0 1 0 0 1 0
0 1 0 1 0 0
0 1 1 0 0 0
1
1
0
1
0
1
1 0 0 0 1 0
1 0 0 1 0 0
1 0 1 0 0 0
1 0 1 1 1 0
1 1 0 0 0 0
1 1 0 1 1 0
1 1 1 0 1 0
1 1 1 1 0 0

Figure : Truth table

P = D 3⊕ D2⊕ D1⊕ D0⊕ P

When data bits matches with the parity bit, then the Error E is zero. If any one of the data bits
changes from 0 to 1 or 1 to 0, then the Error bit E will be 1 indicating the Parity Error.

IC 74280 is a 9-bit Parity generator / checker.

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