Page 73 - Digital Electronics by harish
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Even parity generator
In an even parity system, the number of ones in data bits including the parity bit must be an
even number. For example, the even parity bit for the data bits 0101 must be 0 because we
must have an even number of ones in the data bits including the parity bit. EX-OR gates are
used in parity generator and checker circuits. A 4-bit even parity generator circuit, its truth
table and logic equation are shown in figure.
Figure : Logic diagram of 4-bit Even parity generator
Output
Data input
(Even parity)
D 3 D 2 D 1 D 0 P
0 0 0 0 0
0 0 0 1 1
0 0 1 0 1
0 0 1 1 0
0 1 0 0 1
0 1 0 1 0
0 1 1 0 0
0 1 1 1 1
1 0 0 0 1
1 0 0 1 0
1 0 1 0 0
1 0 1 1 1
1 1 0 0 0
1 1 0 1 1
1 1 1 0 1
1 1 1 1 0
Figure : Truth table of 4-bit Even parity generator
P = D 3⊕ D2⊕ D1⊕ D0
The four data bits along with the parity bit D 3D 2D 1D 0P are transmitted to the receiver circuit.
Even parity Checker
An even-parity checker will produce an error (“1”) if the number of bits in the entire group of
digits including the parity bit is notan even number. A 4-bit even parity checker logic
diagram, truth table and its logic equation are given in figure.
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